Data path functional unites BIST plan optimization (1997)
- Authors:
- USP affiliated authors: AMAZONAS, JOSE ROBERTO DE ALMEIDA - EP ; STRUM, MARIUS - EP ; VALE NETO, JOSE VIEIRA DO - EP ; CHAU, WANG JIANG - EP
- Unidade: EP
- Assunto: CIRCUITOS INTEGRADOS
- Language: Inglês
- Imprenta:
- Publisher: UFRGS
- Publisher place: Porto Alegre
- Date published: 1997
- Conference titles: Brazilian Symposium on Integrated Circuit Design
-
ABNT
AMAZONAS, José Roberto de Almeida et al. Data path functional unites BIST plan optimization. 1997, Anais.. Porto Alegre: UFRGS, 1997. . Acesso em: 21 maio 2024. -
APA
Amazonas, J. R. de A., Strum, M., Vale Neto, J. V. do, Wang, J. C., Rouzeyre, B., & Flotters, M. L. (1997). Data path functional unites BIST plan optimization. In . Porto Alegre: UFRGS. -
NLM
Amazonas JR de A, Strum M, Vale Neto JV do, Wang JC, Rouzeyre B, Flotters ML. Data path functional unites BIST plan optimization. 1997 ;[citado 2024 maio 21 ] -
Vancouver
Amazonas JR de A, Strum M, Vale Neto JV do, Wang JC, Rouzeyre B, Flotters ML. Data path functional unites BIST plan optimization. 1997 ;[citado 2024 maio 21 ] - Built-in self test high level synthesis. (em CD-Rom)
- Transformations for functional modules in hierarchical high level synthesis
- Sistemas digitales: elementos para un diseño a alto nivel
- Sintese da arquitetura de um circuito cancelador de eco
- Synthesis of multi-burst controllers as standard RS architectures
- Miriã_SI: a tool for the synthesis of speed-independent multi burst-mode controllers
- Synthesis of the high performance extended burst mode asynchronous state machines
- The LRD traffic impact on the NoC-based SoCs
- Direct synthesis of speed-independent circuits using multi-burst graph specification
- A strategy for recursive high level synthesis
How to cite
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
