Analysis of harmonic distortion in graded-channel SOI MOSFETs at high temperatures (2004)
- Authors:
- USP affiliated authors: MARTINO, JOÃO ANTONIO - EP ; PAVANELLO, MARCELO ANTONIO - EP
- Unidade: EP
- Assunto: MICROELETRÔNICA
- Language: Inglês
- Imprenta:
- Publisher: The Electrochemical Society
- Publisher place: Pennington
- Date published: 2004
- Source:
- Título do periódico: Microelectronic technology and devices SBMicro 2004. Proceedings, v. 2004-03
- Conference titles: International Symposium on Microelectronics Technology and Devices SBMICRO
-
ABNT
PAVANELLO, Marcelo Antonio et al. Analysis of harmonic distortion in graded-channel SOI MOSFETs at high temperatures. 2004, Anais.. Pennington: The Electrochemical Society, 2004. . Acesso em: 12 maio 2024. -
APA
Pavanello, M. A., Cerdeira, A., Martino, J. A., Alemán, M. A., & Flandre, D. (2004). Analysis of harmonic distortion in graded-channel SOI MOSFETs at high temperatures. In Microelectronic technology and devices SBMicro 2004. Proceedings, v. 2004-03. Pennington: The Electrochemical Society. -
NLM
Pavanello MA, Cerdeira A, Martino JA, Alemán MA, Flandre D. Analysis of harmonic distortion in graded-channel SOI MOSFETs at high temperatures. Microelectronic technology and devices SBMicro 2004. Proceedings, v. 2004-03. 2004 ;[citado 2024 maio 12 ] -
Vancouver
Pavanello MA, Cerdeira A, Martino JA, Alemán MA, Flandre D. Analysis of harmonic distortion in graded-channel SOI MOSFETs at high temperatures. Microelectronic technology and devices SBMicro 2004. Proceedings, v. 2004-03. 2004 ;[citado 2024 maio 12 ] - Potential of improved gain in operational transconductance amplifier using 0,5 Mm graded-channel SOI nMOSFET for applications in the gigahertz range
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- Comparison between conventional and graded-channel SOI nMOSFETs in low temperature operation
- Analog performance of graded-channel SOI NMOSFETS at low temperatures
- Impact of the graded-channel architecture on double gate transistors for high-performance analog applications
- Analysis of deep submicrometer bulk and fully depleted soi nmosfet analog operation at cryogenic temperatures
- Physical characterization and reliability aspects of MuGFETs
- A study on the self-heating effect in deep-submicrometer partially depleted SOI MOSFETs at low temperatures
- Halo effect on 0.13 'mu'm floating-body partially depleted SOI n-Mosfets in low temperature operation
- Analog circuit design using graded-channel silicon-on-insulator nMOSFETs
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