A simple method to model nonrectangular-gate layout in SOI MOSFETs (2005)
- Authors:
- Autor USP: MARTINO, JOAO ANTONIO - EP
- Unidade: EP
- Assunto: MICROELETRÔNICA
- Language: Inglês
- Imprenta:
- Publisher: The Electrochemical Society
- Publisher place: Pennington
- Date published: 2005
- ISBN: 1-56677-426-8
- Source:
- Título do periódico: Microelectronics Technology and Devices SBMICRO 2005
- Conference titles: International Symposium on Microelectronics Technology and Devices SBMICRO
-
ABNT
GIACOMINI, Renato Camargo e MARTINO, João Antonio. A simple method to model nonrectangular-gate layout in SOI MOSFETs. 2005, Anais.. Pennington: The Electrochemical Society, 2005. . Acesso em: 13 jun. 2024. -
APA
Giacomini, R. C., & Martino, J. A. (2005). A simple method to model nonrectangular-gate layout in SOI MOSFETs. In Microelectronics Technology and Devices SBMICRO 2005. Pennington: The Electrochemical Society. -
NLM
Giacomini RC, Martino JA. A simple method to model nonrectangular-gate layout in SOI MOSFETs. Microelectronics Technology and Devices SBMICRO 2005. 2005 ;[citado 2024 jun. 13 ] -
Vancouver
Giacomini RC, Martino JA. A simple method to model nonrectangular-gate layout in SOI MOSFETs. Microelectronics Technology and Devices SBMICRO 2005. 2005 ;[citado 2024 jun. 13 ] - Temperature influences on the drain leakage current behavior in graded-channel SOI nMOSFETs
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- Mobility degradation influence on the SOI MOSFET channel length extraction at 77K
- Low temperature and channel engineering influence on harmonic distortion of soi nmosfets for analog applications
- Analysis of the capacitance vs. voltage in graded channel SOI capacitor
- A simple technique to reduce the influence of the series resistance on the BULK and SOI MOSFET parameter extraction
- Metodo simples para a obtencao da densidade de armadilhas na primeira e segunda interface em soi-mosfet
- Simple method for the determination of the interface trap density at 77k in fully depleted acumulation mode soi mosfets
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