A PD-based methodology to enhance efficiency in testbenches with random stimulation (2009)
- Authors:
- USP affiliated authors: STRUM, MARIUS - EP ; CHAU, WANG JIANG - EP
- Unidade: EP
- DOI: 10.1145/1601896.1601921
- Assunto: ALGORITMOS
- Language: Inglês
- Imprenta:
- Publisher: Sociedade Brasileira de Computação
- Publisher place: Natal
- Date published: 2009
- Source:
- Título do periódico: SBCCI 2009: Proceedings
- Conference titles: Symposium on Integrated Circuits and Systems Design
- Este periódico é de assinatura
- Este artigo NÃO é de acesso aberto
- Cor do Acesso Aberto: closed
-
ABNT
CASTRO MÁRQUEZ, Carlos Iván e STRUM, Marius e WANG, Jiang Chau. A PD-based methodology to enhance efficiency in testbenches with random stimulation. 2009, Anais.. Natal: Sociedade Brasileira de Computação, 2009. Disponível em: https://doi.org/10.1145/1601896.1601921. Acesso em: 01 maio 2024. -
APA
Castro Márquez, C. I., Strum, M., & Wang, J. C. (2009). A PD-based methodology to enhance efficiency in testbenches with random stimulation. In SBCCI 2009: Proceedings. Natal: Sociedade Brasileira de Computação. doi:10.1145/1601896.1601921 -
NLM
Castro Márquez CI, Strum M, Wang JC. A PD-based methodology to enhance efficiency in testbenches with random stimulation [Internet]. SBCCI 2009: Proceedings. 2009 ;[citado 2024 maio 01 ] Available from: https://doi.org/10.1145/1601896.1601921 -
Vancouver
Castro Márquez CI, Strum M, Wang JC. A PD-based methodology to enhance efficiency in testbenches with random stimulation [Internet]. SBCCI 2009: Proceedings. 2009 ;[citado 2024 maio 01 ] Available from: https://doi.org/10.1145/1601896.1601921 - Synthesis of multi-burst controllers as standard RS architectures
- Direct synthesis of speed-independent circuits using multi-burst graph specification
- Miriã_SI: a tool for the synthesis of speed-independent multi burst-mode controllers
- Synthesis of the high performance extended burst mode asynchronous state machines
- The LRD traffic impact on the NoC-based SoCs
- A Functional Verification Methodology Based on Parameter Domains for Efficient Input Stimuli Generation and Coverage Modeling
- Synthesis of speed-independent circuits from multi-burst graph specification and using gate-level architectures
- Transformations for functional modules in hierarchical high level synthesis
- Sistemas digitales: elementos para un diseño a alto nivel
- Optimized cube expansion with binary decision diagrams and expansion graphs for logic minimization
Informações sobre o DOI: 10.1145/1601896.1601921 (Fonte: oaDOI API)
How to cite
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas