GR-Noise Characterization of Ge pFinFETs With STI First and STI Last Processes (2016)
- Authors:
- USP affiliated authors: MARTINO, JOÃO ANTONIO - EP ; AGOPIAN, PAULA GHEDINI DER - EP ; OLIVEIRA, ALBERTO VINICIUS DE - EP
- Unidade: EP
- DOI: 10.1109/led.2016.2595398
- Subjects: SEMICONDUTORES; SILÍCIO
- Language: Inglês
- Source:
- Título do periódico: IEEE Electron Device Letters
- Volume/Número/Paginação/Ano: v. 37, n. 9, p. 1092-1095, Sept. 2016
- Este periódico é de assinatura
- Este artigo é de acesso aberto
- URL de acesso aberto
- Cor do Acesso Aberto: green
- Licença: other-oa
-
ABNT
OLIVEIRA, Alberto Vinicius de et al. GR-Noise Characterization of Ge pFinFETs With STI First and STI Last Processes. IEEE Electron Device Letters, v. 37, n. 9, p. 1092-1095, 2016Tradução . . Disponível em: https://doi.org/10.1109/led.2016.2595398. Acesso em: 21 maio 2024. -
APA
Oliveira, A. V. de, Simoen, E., Mitard, J., Agopian, P. G. D., Langer, R., Witters, L. J., & Martino, J. A. (2016). GR-Noise Characterization of Ge pFinFETs With STI First and STI Last Processes. IEEE Electron Device Letters, 37( 9), 1092-1095. doi:10.1109/led.2016.2595398 -
NLM
Oliveira AV de, Simoen E, Mitard J, Agopian PGD, Langer R, Witters LJ, Martino JA. GR-Noise Characterization of Ge pFinFETs With STI First and STI Last Processes [Internet]. IEEE Electron Device Letters. 2016 ; 37( 9): 1092-1095.[citado 2024 maio 21 ] Available from: https://doi.org/10.1109/led.2016.2595398 -
Vancouver
Oliveira AV de, Simoen E, Mitard J, Agopian PGD, Langer R, Witters LJ, Martino JA. GR-Noise Characterization of Ge pFinFETs With STI First and STI Last Processes [Internet]. IEEE Electron Device Letters. 2016 ; 37( 9): 1092-1095.[citado 2024 maio 21 ] Available from: https://doi.org/10.1109/led.2016.2595398 - Split CV mobility at low temperature operation of Ge pFinFETs fabricated with STI first and last processes
- Low-Frequency Noise Assessment of Different Ge pFinFET STI Processes
- Impact of Gate Stack Layer Composition on Dynamic Threshold Voltage and Analog Parameters of Ge pMOSFETs
- Comparative analysis of the intrinsic voltage gain and unit gain frequency between SOI and bulk FinFETs up to high temperatures
- Threshold voltage extraction in Tunnel FETs
- Low-Frequency Noise Analysis and Modeling in Vertical Tunnel FETs With Ge Source
- Experimental comparison between tensile and compressive uniaxially stressed MuGFETs under X-ray radiation
- Influence of interface trap density on vertical NW-TFETs with different source composition
- Temperature influence on nanowire tunnel field effect transistors
- Different stress techniques and their efficiency on triple-gate SOI n-MOSFETs
Informações sobre o DOI: 10.1109/led.2016.2595398 (Fonte: oaDOI API)
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