Extended TSPC structures with double input/output data throughput for gigahertz CMOS circuit design (2002)
- Authors:
- USP affiliated authors: SOARES JUNIOR, JOAO NAVARRO - EP ; NOIJE, WILHELMUS ADRIANUS MARIA VAN - EP
- Unidade: EP
- DOI: 10.1109/tvlsi.2002.1043333
- Assunto: CIRCUITOS DIGITAIS
- Language: Inglês
- Imprenta:
- Publisher place: Piscataway
- Date published: 2002
- Source:
- Título do periódico: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- ISSN: 1063-8210
- Volume/Número/Paginação/Ano: v. 10, n. 3, p. 301-308, June 2002
- Este periódico é de assinatura
- Este artigo NÃO é de acesso aberto
- Cor do Acesso Aberto: closed
-
ABNT
SOARES JUNIOR, João Navarro e VAN NOIJE, Wilhelmus Adrianus Maria. Extended TSPC structures with double input/output data throughput for gigahertz CMOS circuit design. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v. 10, n. 3, p. 301-308, 2002Tradução . . Disponível em: https://doi.org/10.1109/tvlsi.2002.1043333. Acesso em: 19 abr. 2024. -
APA
Soares Junior, J. N., & Van Noije, W. A. M. (2002). Extended TSPC structures with double input/output data throughput for gigahertz CMOS circuit design. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 10( 3), 301-308. doi:10.1109/tvlsi.2002.1043333 -
NLM
Soares Junior JN, Van Noije WAM. Extended TSPC structures with double input/output data throughput for gigahertz CMOS circuit design [Internet]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2002 ; 10( 3): 301-308.[citado 2024 abr. 19 ] Available from: https://doi.org/10.1109/tvlsi.2002.1043333 -
Vancouver
Soares Junior JN, Van Noije WAM. Extended TSPC structures with double input/output data throughput for gigahertz CMOS circuit design [Internet]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2002 ; 10( 3): 301-308.[citado 2024 abr. 19 ] Available from: https://doi.org/10.1109/tvlsi.2002.1043333 - A 3.5 mW programmable high speed frequency divider for a 2.4 GHz CMOS frequency synthesizer
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- E-TSPC: extended true single-phase-clock MOS circuit technique for high speed applications
- A 4.1 GHz dual modulus prescaler using the E-TSPC technique and double data throughput structures
- Fully integrated cmos clock recovery at gbits / rates
- A 1.6 GHz dual modulus prescaler using the extended true single-phase-clock CMOS circuit technique (E-TSPC)
- Recuperador de clock em estrutura gate array do tipo mar de transistores
- Precise final state determination of mismatched cmos latches
- Metodos de teste de conversores a / d e sua aplicacao em projeto
- Analog circuits on sog gate arrays: an 100mhz 6-bit d / a converter
Informações sobre o DOI: 10.1109/tvlsi.2002.1043333 (Fonte: oaDOI API)
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