Study of the drain leakage current behavior in graded-channel SOI nMOSFETs operating at high temperatures (2004)
- Authors:
- Autor USP: MARTINO, JOÃO ANTONIO - EP
- Unidade: EP
- DOI: 10.29292/jics.v1i2.261
- Assunto: CIRCUITOS INTEGRADOS
- Language: Inglês
- Imprenta:
- Source:
- Título do periódico: Journal Integrated Circuits and Systems
- ISSN: 1807-1953
- Volume/Número/Paginação/Ano: v.1, n.2, p.31-35, June 2004
- Este periódico é de acesso aberto
- Este artigo é de acesso aberto
- URL de acesso aberto
- Cor do Acesso Aberto: gold
-
ABNT
BELLODI, Marcello e MARTINO, João Antonio. Study of the drain leakage current behavior in graded-channel SOI nMOSFETs operating at high temperatures. Journal Integrated Circuits and Systems, v. 1, n. 2, p. 31-35, 2004Tradução . . Disponível em: https://doi.org/10.29292/jics.v1i2.261. Acesso em: 23 abr. 2024. -
APA
Bellodi, M., & Martino, J. A. (2004). Study of the drain leakage current behavior in graded-channel SOI nMOSFETs operating at high temperatures. Journal Integrated Circuits and Systems, 1( 2), 31-35. doi:10.29292/jics.v1i2.261 -
NLM
Bellodi M, Martino JA. Study of the drain leakage current behavior in graded-channel SOI nMOSFETs operating at high temperatures [Internet]. Journal Integrated Circuits and Systems. 2004 ;1( 2): 31-35.[citado 2024 abr. 23 ] Available from: https://doi.org/10.29292/jics.v1i2.261 -
Vancouver
Bellodi M, Martino JA. Study of the drain leakage current behavior in graded-channel SOI nMOSFETs operating at high temperatures [Internet]. Journal Integrated Circuits and Systems. 2004 ;1( 2): 31-35.[citado 2024 abr. 23 ] Available from: https://doi.org/10.29292/jics.v1i2.261 - Temperature influences on the drain leakage current behavior in graded-channel SOI nMOSFETs
- Projeto de processos de fabricação avançados aplicáveis nas tecnologias CMOS micrométricas
- Analysis of the linear kink effect in partially depleted SOI nMOSFETs
- Simple method to extract the length dependent mobility degradation factor at 77 K
- Mobility degradation influence on the SOI MOSFET channel length extraction at 77K
- Low temperature and channel engineering influence on harmonic distortion of soi nmosfets for analog applications
- Analysis of the capacitance vs. voltage in graded channel SOI capacitor
- A simple technique to reduce the influence of the series resistance on the BULK and SOI MOSFET parameter extraction
- Metodo simples para a obtencao da densidade de armadilhas na primeira e segunda interface em soi-mosfet
- Simple method for the determination of the interface trap density at 77k in fully depleted acumulation mode soi mosfets
Informações sobre o DOI: 10.29292/jics.v1i2.261 (Fonte: oaDOI API)
How to cite
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
