Halo effect on 0.13 'mu'm floating-body partially depleted SOI n-Mosfets in low temperature operation (2003)
- Authors:
- USP affiliated authors: MARTINO, JOÃO ANTONIO - EP ; PAVANELLO, MARCELO ANTONIO - EP
- Unidade: EP
- Assunto: MICROELETRÔNICA
- Language: Inglês
- Imprenta:
- Publisher: The Electrochemical Society
- Publisher place: Pennington
- Date published: 2003
- Source:
- Título do periódico: Proceedings
- Conference titles: International Symposium on Low Temperature Electronics
-
ABNT
MARTINO, João Antonio et al. Halo effect on 0.13 'mu'm floating-body partially depleted SOI n-Mosfets in low temperature operation. 2003, Anais.. Pennington: The Electrochemical Society, 2003. . Acesso em: 26 abr. 2024. -
APA
Martino, J. A., Pavanello, M. A., Simoen, E., & Claeys, C. (2003). Halo effect on 0.13 'mu'm floating-body partially depleted SOI n-Mosfets in low temperature operation. In Proceedings. Pennington: The Electrochemical Society. -
NLM
Martino JA, Pavanello MA, Simoen E, Claeys C. Halo effect on 0.13 'mu'm floating-body partially depleted SOI n-Mosfets in low temperature operation. Proceedings. 2003 ;[citado 2024 abr. 26 ] -
Vancouver
Martino JA, Pavanello MA, Simoen E, Claeys C. Halo effect on 0.13 'mu'm floating-body partially depleted SOI n-Mosfets in low temperature operation. Proceedings. 2003 ;[citado 2024 abr. 26 ] - Potential of improved gain in operational transconductance amplifier using 0,5 Mm graded-channel SOI nMOSFET for applications in the gigahertz range
- Behavior of graded channel SOI gate-all-around NMOSFET devices at high temperatures
- Comparison between conventional and graded-channel SOI nMOSFETs in low temperature operation
- Analog performance of graded-channel SOI NMOSFETS at low temperatures
- Impact of the graded-channel architecture on double gate transistors for high-performance analog applications
- Comparison between 0.13Mm partially-depleted silicon-on-insulator technology with floating body operation at 300 K and 90 K
- Implementation of tunable resistors using graded-channel SOI MOSFETs operating in cryogenic environments
- Analysis of harmonic distortion in graded-channel SOI MOSFETs at high temperatures
- Design of operational transconductance amplifiers with improved gain by using graded-channel SOI nMOSFETs
- Comparison between drain induced barrier lowering in partially and fully depleted 0.13'mu'm SOI nMOSFETs in low temperature operation
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