Autotuning high-level synthesis for FPGAs using OpenTuner and LegUp (2018)
- Authors:
- Autor USP: LEJBMAN, ALFREDO GOLDMAN VEL - IME
- Unidade: IME
- DOI: 10.1109/RECONFIG.2017.8279778
- Subjects: PROGRAMAÇÃO LÓGICA; HARDWARE
- Keywords: measurement; field programmable gate arrays; tools; optimization; hardware design languages; registers
- Agências de fomento:
- Language: Inglês
- Imprenta:
- Publisher: IEEE
- Publisher place: Piscataway
- Date published: 2018
- Source:
- Título do periódico: Proceedings
- Conference titles: International Conference on Reconfigurable Computing and FPGAs - ReConFig
- Este periódico é de assinatura
- Este artigo NÃO é de acesso aberto
- Cor do Acesso Aberto: closed
-
ABNT
BRUEL, Pedro et al. Autotuning high-level synthesis for FPGAs using OpenTuner and LegUp. 2018, Anais.. Piscataway: IEEE, 2018. Disponível em: https://doi.org/10.1109/RECONFIG.2017.8279778. Acesso em: 16 abr. 2024. -
APA
Bruel, P., Goldman, A., Chalamalasetti, S. R., & Milojicic, D. (2018). Autotuning high-level synthesis for FPGAs using OpenTuner and LegUp. In Proceedings. Piscataway: IEEE. doi:10.1109/RECONFIG.2017.8279778 -
NLM
Bruel P, Goldman A, Chalamalasetti SR, Milojicic D. Autotuning high-level synthesis for FPGAs using OpenTuner and LegUp [Internet]. Proceedings. 2018 ;[citado 2024 abr. 16 ] Available from: https://doi.org/10.1109/RECONFIG.2017.8279778 -
Vancouver
Bruel P, Goldman A, Chalamalasetti SR, Milojicic D. Autotuning high-level synthesis for FPGAs using OpenTuner and LegUp [Internet]. Proceedings. 2018 ;[citado 2024 abr. 16 ] Available from: https://doi.org/10.1109/RECONFIG.2017.8279778 - A model for parallel job schedulling on dynamical computer grids
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Informações sobre o DOI: 10.1109/RECONFIG.2017.8279778 (Fonte: oaDOI API)
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