Improved operation of graded-channel SOI nMOSFETs down to liquid helium temperature (2016)
- Authors:
- USP affiliated authors: MARTINO, JOÃO ANTONIO - EP ; PAVANELLO, MARCELO ANTONIO - EP
- Unidade: EP
- DOI: 10.1088/0268-1242/31/11/114005
- Subjects: SILÍCIO; SEMICONDUTORES
- Language: Inglês
- Source:
- Título do periódico: Semiconductor Science and Technology
- Volume/Número/Paginação/Ano: v. 31, n. 11, p. 114005, 2016
- Este periódico é de assinatura
- Este artigo NÃO é de acesso aberto
- Cor do Acesso Aberto: closed
-
ABNT
PAVANELLO, Marcelo Antonio et al. Improved operation of graded-channel SOI nMOSFETs down to liquid helium temperature. Semiconductor Science and Technology, v. 31, n. 11, p. 114005, 2016Tradução . . Disponível em: https://doi.org/10.1088/0268-1242/31/11/114005. Acesso em: 20 abr. 2024. -
APA
Pavanello, M. A., Souza, M. de, Ribeiro, T. A., Martino, J. A., & Flandre, D. (2016). Improved operation of graded-channel SOI nMOSFETs down to liquid helium temperature. Semiconductor Science and Technology, 31( 11), 114005. doi:10.1088/0268-1242/31/11/114005 -
NLM
Pavanello MA, Souza M de, Ribeiro TA, Martino JA, Flandre D. Improved operation of graded-channel SOI nMOSFETs down to liquid helium temperature [Internet]. Semiconductor Science and Technology. 2016 ; 31( 11): 114005.[citado 2024 abr. 20 ] Available from: https://doi.org/10.1088/0268-1242/31/11/114005 -
Vancouver
Pavanello MA, Souza M de, Ribeiro TA, Martino JA, Flandre D. Improved operation of graded-channel SOI nMOSFETs down to liquid helium temperature [Internet]. Semiconductor Science and Technology. 2016 ; 31( 11): 114005.[citado 2024 abr. 20 ] Available from: https://doi.org/10.1088/0268-1242/31/11/114005 - Potential of improved gain in operational transconductance amplifier using 0,5 Mm graded-channel SOI nMOSFET for applications in the gigahertz range
- Behavior of graded channel SOI gate-all-around NMOSFET devices at high temperatures
- Comparison between conventional and graded-channel SOI nMOSFETs in low temperature operation
- Analog performance of graded-channel SOI NMOSFETS at low temperatures
- Impact of the graded-channel architecture on double gate transistors for high-performance analog applications
- Analysis of deep submicrometer bulk and fully depleted soi nmosfet analog operation at cryogenic temperatures
- Physical characterization and reliability aspects of MuGFETs
- A study on the self-heating effect in deep-submicrometer partially depleted SOI MOSFETs at low temperatures
- Halo effect on 0.13 'mu'm floating-body partially depleted SOI n-Mosfets in low temperature operation
- Analog circuit design using graded-channel silicon-on-insulator nMOSFETs
Informações sobre o DOI: 10.1088/0268-1242/31/11/114005 (Fonte: oaDOI API)
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