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Artigo de periodico
ISFET fabrication and characterization for hydrogen peroxide sensing (2023)
Duarte, Pedro Henrique; Rangel, Ricardo Cardoso; Ramos, Daniel Augusto; Yojo, Leonardo Shimizu; Mori, Carlos Augusto Bergfeld; Sasaki, Katia Regina Akemi; Agopian, Paula Ghedini Der ; Martino, João Antonio
Source: Journal of Integrated Circuits and Systems. Unidade: EP
Subjects: TRANSISTORES, SOLUÇÕES
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ABNT
DUARTE, Pedro Henrique et al. ISFET fabrication and characterization for hydrogen peroxide sensing. Journal of Integrated Circuits and Systems, v. 18, n. 1, p. 1-4, 2023Tradução . . Disponível em: https://doi.org/10.29292/jics.v18i1.646. Acesso em: 04 maio 2024.
APA
Duarte, P. H., Rangel, R. C., Ramos, D. A., Yojo, L. S., Mori, C. A. B., Sasaki, K. R. A., et al. (2023). ISFET fabrication and characterization for hydrogen peroxide sensing. Journal of Integrated Circuits and Systems, 18( 1), 1-4. doi:10.29292/jics.v18i1.646
NLM
Duarte PH, Rangel RC, Ramos DA, Yojo LS, Mori CAB, Sasaki KRA, Agopian PGD, Martino JA. ISFET fabrication and characterization for hydrogen peroxide sensing [Internet]. Journal of Integrated Circuits and Systems. 2023 ; 18( 1): 1-4.[citado 2024 maio 04 ] Available from: https://doi.org/10.29292/jics.v18i1.646
Vancouver
Duarte PH, Rangel RC, Ramos DA, Yojo LS, Mori CAB, Sasaki KRA, Agopian PGD, Martino JA. ISFET fabrication and characterization for hydrogen peroxide sensing [Internet]. Journal of Integrated Circuits and Systems. 2023 ; 18( 1): 1-4.[citado 2024 maio 04 ] Available from: https://doi.org/10.29292/jics.v18i1.646
Artigo de periodico
Experimental study of MISHEMT from 450 K down to 200 K for analog applications (2023)
Perina, Welder Fernandes; Martino, João Antonio ; Simoen, Eddy ; Peralagu, Uthayasankaran; Collaert, Nadine ; Agopian, Paula Ghedini Der
Source: Solid State Electronics. Unidade: EP
Subjects: TRANSISTORES, CIRCUITOS ANALÓGICOS, SEMICONDUTORES
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ABNT
PERINA, Welder Fernandes et al. Experimental study of MISHEMT from 450 K down to 200 K for analog applications. Solid State Electronics, v. 208, p. 1-4, 2023Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2023.108742. Acesso em: 04 maio 2024.
APA
Perina, W. F., Martino, J. A., Simoen, E., Peralagu, U., Collaert, N., & Agopian, P. G. D. (2023). Experimental study of MISHEMT from 450 K down to 200 K for analog applications. Solid State Electronics, 208, 1-4. doi:10.1016/j.sse.2023.108742
NLM
Perina WF, Martino JA, Simoen E, Peralagu U, Collaert N, Agopian PGD. Experimental study of MISHEMT from 450 K down to 200 K for analog applications [Internet]. Solid State Electronics. 2023 ; 208 1-4.[citado 2024 maio 04 ] Available from: https://doi.org/10.1016/j.sse.2023.108742
Vancouver
Perina WF, Martino JA, Simoen E, Peralagu U, Collaert N, Agopian PGD. Experimental study of MISHEMT from 450 K down to 200 K for analog applications [Internet]. Solid State Electronics. 2023 ; 208 1-4.[citado 2024 maio 04 ] Available from: https://doi.org/10.1016/j.sse.2023.108742
Artigo de periodico
Comparison of low-dropout voltage regulators designed with line and nanowire tunnel-FET experimental data including a simple process variability analysis (2023)
Silva, Wenita de Lima; Toledo, Rodrigo do Nascimento; Gonçalez Filho, Walter; Nogueira, Alexandro de Moraes; Agopian, Paula Ghedini Der ; Martino, João Antonio
Source: Solid State Electronics. Unidade: EP
Subjects: TRANSISTORES, CIRCUITOS ANALÓGICOS, NANOTECNOLOGIA
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ABNT
SILVA, Wenita de Lima et al. Comparison of low-dropout voltage regulators designed with line and nanowire tunnel-FET experimental data including a simple process variability analysis. Solid State Electronics, v. 202, p. 1-8, 2023Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2023.108611. Acesso em: 04 maio 2024.
APA
Silva, W. de L., Toledo, R. do N., Gonçalez Filho, W., Nogueira, A. de M., Agopian, P. G. D., & Martino, J. A. (2023). Comparison of low-dropout voltage regulators designed with line and nanowire tunnel-FET experimental data including a simple process variability analysis. Solid State Electronics, 202, 1-8. doi:10.1016/j.sse.2023.108611
NLM
Silva W de L, Toledo R do N, Gonçalez Filho W, Nogueira A de M, Agopian PGD, Martino JA. Comparison of low-dropout voltage regulators designed with line and nanowire tunnel-FET experimental data including a simple process variability analysis [Internet]. Solid State Electronics. 2023 ; 202 1-8.[citado 2024 maio 04 ] Available from: https://doi.org/10.1016/j.sse.2023.108611
Vancouver
Silva W de L, Toledo R do N, Gonçalez Filho W, Nogueira A de M, Agopian PGD, Martino JA. Comparison of low-dropout voltage regulators designed with line and nanowire tunnel-FET experimental data including a simple process variability analysis [Internet]. Solid State Electronics. 2023 ; 202 1-8.[citado 2024 maio 04 ] Available from: https://doi.org/10.1016/j.sse.2023.108611
Trabalho de evento
Analysis of the trade-off between voltage gain and frequency response of OTA designed using experimental data of omega-gate nanowire SOI MOSFETs (2023)
Araújo, Gustavo Vinicius de; Martino, João Antonio ; Agopian, Paula Ghedini Der
Source: SBMicro. Conference titles: Symposium on Microelectronics Technology and Devices. Unidade: EP
Subjects: TRANSISTORES, CIRCUITOS ANALÓGICOS, MICROELETRÔNICA, MATERIAIS NANOESTRUTURADOS
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ABNT
ARAÚJO, Gustavo Vinicius de e MARTINO, João Antonio e AGOPIAN, Paula Ghedini Der. Analysis of the trade-off between voltage gain and frequency response of OTA designed using experimental data of omega-gate nanowire SOI MOSFETs. 2023, Anais.. [Piscataway, N.J.]: IEEE, 2023. Disponível em: https://doi.org/10.1109/SBMicro60499.2023.10302603. Acesso em: 04 maio 2024.
APA
Araújo, G. V. de, Martino, J. A., & Agopian, P. G. D. (2023). Analysis of the trade-off between voltage gain and frequency response of OTA designed using experimental data of omega-gate nanowire SOI MOSFETs. In SBMicro. [Piscataway, N.J.]: IEEE. doi:10.1109/SBMicro60499.2023.10302603
NLM
Araújo GV de, Martino JA, Agopian PGD. Analysis of the trade-off between voltage gain and frequency response of OTA designed using experimental data of omega-gate nanowire SOI MOSFETs [Internet]. SBMicro. 2023 ;[citado 2024 maio 04 ] Available from: https://doi.org/10.1109/SBMicro60499.2023.10302603
Vancouver
Araújo GV de, Martino JA, Agopian PGD. Analysis of the trade-off between voltage gain and frequency response of OTA designed using experimental data of omega-gate nanowire SOI MOSFETs [Internet]. SBMicro. 2023 ;[citado 2024 maio 04 ] Available from: https://doi.org/10.1109/SBMicro60499.2023.10302603
Artigo de periodico
Hybrid low-dropout voltage regulator designed with TFET-MOSFET nanowire technologies (2023)
Toledo, Rodrigo do Nascimento; Martino, João Antonio ; Agopian, Paula Ghedini Der
Source: Semiconductor Science and Technology. Unidade: EP
Subjects: CIRCUITOS ANALÓGICOS, TRANSISTORES
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ABNT
TOLEDO, Rodrigo do Nascimento e MARTINO, João Antonio e AGOPIAN, Paula Ghedini Der. Hybrid low-dropout voltage regulator designed with TFET-MOSFET nanowire technologies. Semiconductor Science and Technology, v. 38, n. 9, p. 1-12, 2023Tradução . . Disponível em: https://doi.org/10.1088/1361-6641/aceb84. Acesso em: 04 maio 2024.
APA
Toledo, R. do N., Martino, J. A., & Agopian, P. G. D. (2023). Hybrid low-dropout voltage regulator designed with TFET-MOSFET nanowire technologies. Semiconductor Science and Technology, 38( 9), 1-12. doi:10.1088/1361-6641/aceb84
NLM
Toledo R do N, Martino JA, Agopian PGD. Hybrid low-dropout voltage regulator designed with TFET-MOSFET nanowire technologies [Internet]. Semiconductor Science and Technology. 2023 ; 38( 9): 1-12.[citado 2024 maio 04 ] Available from: https://doi.org/10.1088/1361-6641/aceb84
Vancouver
Toledo R do N, Martino JA, Agopian PGD. Hybrid low-dropout voltage regulator designed with TFET-MOSFET nanowire technologies [Internet]. Semiconductor Science and Technology. 2023 ; 38( 9): 1-12.[citado 2024 maio 04 ] Available from: https://doi.org/10.1088/1361-6641/aceb84
Artigo de periodico
Evaluation of n-type gate-all-around vertically-stacked nanosheet FETs from 473 K down to 173 K for analog applications (2023)
Silva, V C P; Martino, João Antonio ; Simoen, Eddy ; Veloso, Anabela; Agopian, Paula Ghedini Der
Source: Solid State Electronics. Unidade: EP
Subjects: TRANSISTORES, TEMPERATURA, NANOTECNOLOGIA, CIRCUITOS ANALÓGICOS, CIRCUITOS DIGITAIS
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ABNT
SILVA, V C P et al. Evaluation of n-type gate-all-around vertically-stacked nanosheet FETs from 473 K down to 173 K for analog applications. Solid State Electronics, v. 208, p. 1-5, 2023Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2023.108729. Acesso em: 04 maio 2024.
APA
Silva, V. C. P., Martino, J. A., Simoen, E., Veloso, A., & Agopian, P. G. D. (2023). Evaluation of n-type gate-all-around vertically-stacked nanosheet FETs from 473 K down to 173 K for analog applications. Solid State Electronics, 208, 1-5. doi:10.1016/j.sse.2023.108729
NLM
Silva VCP, Martino JA, Simoen E, Veloso A, Agopian PGD. Evaluation of n-type gate-all-around vertically-stacked nanosheet FETs from 473 K down to 173 K for analog applications [Internet]. Solid State Electronics. 2023 ;208 1-5.[citado 2024 maio 04 ] Available from: https://doi.org/10.1016/j.sse.2023.108729
Vancouver
Silva VCP, Martino JA, Simoen E, Veloso A, Agopian PGD. Evaluation of n-type gate-all-around vertically-stacked nanosheet FETs from 473 K down to 173 K for analog applications [Internet]. Solid State Electronics. 2023 ;208 1-5.[citado 2024 maio 04 ] Available from: https://doi.org/10.1016/j.sse.2023.108729
Trabalho de evento
Trade-off between channel length and mechanical stress in the operational transconductance amplifier designed with SOI FinFET (2023)
Ribeiro, Arllen D.R; Araújo, Gustavo Vinicius de; Martino, João Antonio ; Agopian, Paula Ghedini Der
Source: SBMicro. Conference titles: Symposium on Microelectronics Technology and Devices. Unidade: EP
Subjects: DISPOSITIVOS ELETRÔNICOS, TRANSISTORES, MICROELETRÔNICA
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ABNT
RIBEIRO, Arllen D.R et al. Trade-off between channel length and mechanical stress in the operational transconductance amplifier designed with SOI FinFET. 2023, Anais.. [Piscataway, N.J.]: IEEE, 2023. Disponível em: https://doi.org/10.1109/SBMicro60499.2023.10302575. Acesso em: 04 maio 2024.
APA
Ribeiro, A. D. R., Araújo, G. V. de, Martino, J. A., & Agopian, P. G. D. (2023). Trade-off between channel length and mechanical stress in the operational transconductance amplifier designed with SOI FinFET. In SBMicro. [Piscataway, N.J.]: IEEE. doi:10.1109/SBMicro60499.2023.10302575
NLM
Ribeiro ADR, Araújo GV de, Martino JA, Agopian PGD. Trade-off between channel length and mechanical stress in the operational transconductance amplifier designed with SOI FinFET [Internet]. SBMicro. 2023 ;[citado 2024 maio 04 ] Available from: https://doi.org/10.1109/SBMicro60499.2023.10302575
Vancouver
Ribeiro ADR, Araújo GV de, Martino JA, Agopian PGD. Trade-off between channel length and mechanical stress in the operational transconductance amplifier designed with SOI FinFET [Internet]. SBMicro. 2023 ;[citado 2024 maio 04 ] Available from: https://doi.org/10.1109/SBMicro60499.2023.10302575
Trabalho de evento
Study of the effect of multiple conductions on threshold voltage in a MIS-HEMT from 450 K down to 200 K (2023)
Perina, Welder Fernandes; Martino, João Antonio ; Simoen, Eddy ; Peralagu, Uthayasankaran; Collaert, Nadine ; Agopian, Paula Ghedini Der
Source: SBMicro. Conference titles: Symposium on Microelectronics Technology and Devices. Unidade: EP
Subjects: TRANSISTORES, SEMICONDUTORES
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ABNT
PERINA, Welder Fernandes et al. Study of the effect of multiple conductions on threshold voltage in a MIS-HEMT from 450 K down to 200 K. 2023, Anais.. [Piscataway, N.J.]: IEEE, 2023. Disponível em: https://doi.org/10.1109/SBMicro60499.2023.10302604. Acesso em: 04 maio 2024.
APA
Perina, W. F., Martino, J. A., Simoen, E., Peralagu, U., Collaert, N., & Agopian, P. G. D. (2023). Study of the effect of multiple conductions on threshold voltage in a MIS-HEMT from 450 K down to 200 K. In SBMicro. [Piscataway, N.J.]: IEEE. doi:10.1109/SBMicro60499.2023.10302604
NLM
Perina WF, Martino JA, Simoen E, Peralagu U, Collaert N, Agopian PGD. Study of the effect of multiple conductions on threshold voltage in a MIS-HEMT from 450 K down to 200 K [Internet]. SBMicro. 2023 ;[citado 2024 maio 04 ] Available from: https://doi.org/10.1109/SBMicro60499.2023.10302604
Vancouver
Perina WF, Martino JA, Simoen E, Peralagu U, Collaert N, Agopian PGD. Study of the effect of multiple conductions on threshold voltage in a MIS-HEMT from 450 K down to 200 K [Internet]. SBMicro. 2023 ;[citado 2024 maio 04 ] Available from: https://doi.org/10.1109/SBMicro60499.2023.10302604
Trabalho de evento
Influence of gate insulator and AlGaN barrier layer on MISHEMT conduction mechanisms (2023)
Canales, Bruno Godoy; Martino, João Antonio ; Agopian, Paula Ghedini Der
Source: SBMicro. Conference titles: Symposium on Microelectronics Technology and Devices (SBMicro). Unidade: EP
Subjects: TRANSISTORES, SEMICONDUTORES
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ABNT
CANALES, Bruno Godoy e MARTINO, João Antonio e AGOPIAN, Paula Ghedini Der. Influence of gate insulator and AlGaN barrier layer on MISHEMT conduction mechanisms. 2023, Anais.. [Piscataway]: IEEE, 2023. Disponível em: https://doi.org/10.1109/SBMicro60499.2023.10302593. Acesso em: 04 maio 2024.
APA
Canales, B. G., Martino, J. A., & Agopian, P. G. D. (2023). Influence of gate insulator and AlGaN barrier layer on MISHEMT conduction mechanisms. In SBMicro. [Piscataway]: IEEE. doi:10.1109/SBMicro60499.2023.10302593
NLM
Canales BG, Martino JA, Agopian PGD. Influence of gate insulator and AlGaN barrier layer on MISHEMT conduction mechanisms [Internet]. SBMicro. 2023 ;[citado 2024 maio 04 ] Available from: https://doi.org/10.1109/SBMicro60499.2023.10302593
Vancouver
Canales BG, Martino JA, Agopian PGD. Influence of gate insulator and AlGaN barrier layer on MISHEMT conduction mechanisms [Internet]. SBMicro. 2023 ;[citado 2024 maio 04 ] Available from: https://doi.org/10.1109/SBMicro60499.2023.10302593
Artigo de periodico
Experimental study of MISHEMT from 450k down to 200 k for analog applications (2023)
Perina, Welder Fernandes; Martino, João Antonio ; Simoen, Eddy ; Peralagu, Uthayasankaran; Collaert, Nadine ; Agopian, Paula Ghedini Der
Source: Solid State Electronics. Unidade: EP
Subjects: TRANSISTORES, CIRCUITOS ANALÓGICOS, TEMPERATURA
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
PERINA, Welder Fernandes et al. Experimental study of MISHEMT from 450k down to 200 k for analog applications. Solid State Electronics, v. 208, p. 1-4, 2023Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2023.108742. Acesso em: 04 maio 2024.
APA
Perina, W. F., Martino, J. A., Simoen, E., Peralagu, U., Collaert, N., & Agopian, P. G. D. (2023). Experimental study of MISHEMT from 450k down to 200 k for analog applications. Solid State Electronics, 208, 1-4. doi:10.1016/j.sse.2023.108742
NLM
Perina WF, Martino JA, Simoen E, Peralagu U, Collaert N, Agopian PGD. Experimental study of MISHEMT from 450k down to 200 k for analog applications [Internet]. Solid State Electronics. 2023 ; 208 1-4.[citado 2024 maio 04 ] Available from: https://doi.org/10.1016/j.sse.2023.108742
Vancouver
Perina WF, Martino JA, Simoen E, Peralagu U, Collaert N, Agopian PGD. Experimental study of MISHEMT from 450k down to 200 k for analog applications [Internet]. Solid State Electronics. 2023 ; 208 1-4.[citado 2024 maio 04 ] Available from: https://doi.org/10.1016/j.sse.2023.108742
Artigo de periodico
Back gate bias influence on BESOI ISFET sensitivity (2023)
Duarte, Pedro Henrique; Rangel, Ricardo Cardoso; Ramos, Daniel Augusto; Yojo, Leonardo Shimizu; Sasaki, Kátia Regina Akemi ; Agopian, Paula Ghedini Der ; Martino, João Antonio
Source: ECS Transactions. Unidade: EP
Subjects: ELETRODO, REFRATÁRIOS, METALOGRAFIA
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ABNT
DUARTE, Pedro Henrique et al. Back gate bias influence on BESOI ISFET sensitivity. ECS Transactions, v. 111, n. 1, p. 279-284, 2023Tradução . . Disponível em: https://doi.org/10.1149/11101.0279ecst. Acesso em: 04 maio 2024.
APA
Duarte, P. H., Rangel, R. C., Ramos, D. A., Yojo, L. S., Sasaki, K. R. A., Agopian, P. G. D., & Martino, J. A. (2023). Back gate bias influence on BESOI ISFET sensitivity. ECS Transactions, 111( 1), 279-284. doi:10.1149/11101.0279ecst
NLM
Duarte PH, Rangel RC, Ramos DA, Yojo LS, Sasaki KRA, Agopian PGD, Martino JA. Back gate bias influence on BESOI ISFET sensitivity [Internet]. ECS Transactions. 2023 ; 111( 1): 279-284.[citado 2024 maio 04 ] Available from: https://doi.org/10.1149/11101.0279ecst
Vancouver
Duarte PH, Rangel RC, Ramos DA, Yojo LS, Sasaki KRA, Agopian PGD, Martino JA. Back gate bias influence on BESOI ISFET sensitivity [Internet]. ECS Transactions. 2023 ; 111( 1): 279-284.[citado 2024 maio 04 ] Available from: https://doi.org/10.1149/11101.0279ecst
Artigo de periodico
MISHEMT intrinsic voltage gain under multiple channel output characteristics (2023)
Canales, Bruno Godoy; Perina, Welder Fernandes; Martino, João Antonio ; Simoen, Eddy ; Peralagu, Uthayasankaran; Collaert, Nadine ; Agopian, Paula Ghedini Der
Source: Semiconductor Science and Technology. Unidade: EP
Subjects: TRANSISTORES, SEMICONDUTORES
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
CANALES, Bruno Godoy et al. MISHEMT intrinsic voltage gain under multiple channel output characteristics. Semiconductor Science and Technology, v. 38, n. 11, p. 1-6, 2023Tradução . . Disponível em: https://doi.org/10.1088/1361-6641/acfa1f. Acesso em: 04 maio 2024.
APA
Canales, B. G., Perina, W. F., Martino, J. A., Simoen, E., Peralagu, U., Collaert, N., & Agopian, P. G. D. (2023). MISHEMT intrinsic voltage gain under multiple channel output characteristics. Semiconductor Science and Technology, 38( 11), 1-6. doi:10.1088/1361-6641/acfa1f
NLM
Canales BG, Perina WF, Martino JA, Simoen E, Peralagu U, Collaert N, Agopian PGD. MISHEMT intrinsic voltage gain under multiple channel output characteristics [Internet]. Semiconductor Science and Technology. 2023 ; 38( 11): 1-6.[citado 2024 maio 04 ] Available from: https://doi.org/10.1088/1361-6641/acfa1f
Vancouver
Canales BG, Perina WF, Martino JA, Simoen E, Peralagu U, Collaert N, Agopian PGD. MISHEMT intrinsic voltage gain under multiple channel output characteristics [Internet]. Semiconductor Science and Technology. 2023 ; 38( 11): 1-6.[citado 2024 maio 04 ] Available from: https://doi.org/10.1088/1361-6641/acfa1f
Artigo de periodico
Low-dropout voltage regulator designed with nanowire TFET with different source composition experimental data (2023)
Toledo, Rodrigo do Nascimento; Martino, João Antonio ; Agopian, Paula Ghedini Der
Source: Journal of Integrated Circuits and Systems. Unidade: EP
Subjects: TRANSISTORES, CIRCUITOS ANALÓGICOS, NANOTECNOLOGIA
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
TOLEDO, Rodrigo do Nascimento e MARTINO, João Antonio e AGOPIAN, Paula Ghedini Der. Low-dropout voltage regulator designed with nanowire TFET with different source composition experimental data. Journal of Integrated Circuits and Systems, v. 18, n. 1, p. 1-6, 2023Tradução . . Disponível em: https://doi.org/10.29292/jics.v18i1.653. Acesso em: 04 maio 2024.
APA
Toledo, R. do N., Martino, J. A., & Agopian, P. G. D. (2023). Low-dropout voltage regulator designed with nanowire TFET with different source composition experimental data. Journal of Integrated Circuits and Systems, 18( 1), 1-6. doi:10.29292/jics.v18il.653
NLM
Toledo R do N, Martino JA, Agopian PGD. Low-dropout voltage regulator designed with nanowire TFET with different source composition experimental data [Internet]. Journal of Integrated Circuits and Systems. 2023 ;18( 1): 1-6.[citado 2024 maio 04 ] Available from: https://doi.org/10.29292/jics.v18i1.653
Vancouver
Toledo R do N, Martino JA, Agopian PGD. Low-dropout voltage regulator designed with nanowire TFET with different source composition experimental data [Internet]. Journal of Integrated Circuits and Systems. 2023 ;18( 1): 1-6.[citado 2024 maio 04 ] Available from: https://doi.org/10.29292/jics.v18i1.653
Trabalho de evento
Analysis of low-dropout voltage regulator designed with gate-all-around nanosheet transistors (2023)
Souto, Rayana Carvalho de Barros; Martino, João Antonio ; Agopian, Paula Ghedini Der
Source: SBMicro. Conference titles: Symposium on Microelectronics Technology and Devices. Unidade: EP
Subjects: TRANSISTORES, MICROELETRÔNICA, MATERIAIS NANOESTRUTURADOS
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
SOUTO, Rayana Carvalho de Barros e MARTINO, João Antonio e AGOPIAN, Paula Ghedini Der. Analysis of low-dropout voltage regulator designed with gate-all-around nanosheet transistors. 2023, Anais.. [Piscataway]: IEEE, 2023. Disponível em: https://doi.org/10.1109/SBMicro60499.2023.10302596. Acesso em: 04 maio 2024.
APA
Souto, R. C. de B., Martino, J. A., & Agopian, P. G. D. (2023). Analysis of low-dropout voltage regulator designed with gate-all-around nanosheet transistors. In SBMicro. [Piscataway]: IEEE. doi:10.1109/SBMicro60499.2023.10302596
NLM
Souto RC de B, Martino JA, Agopian PGD. Analysis of low-dropout voltage regulator designed with gate-all-around nanosheet transistors [Internet]. SBMicro. 2023 ;[citado 2024 maio 04 ] Available from: https://doi.org/10.1109/SBMicro60499.2023.10302596
Vancouver
Souto RC de B, Martino JA, Agopian PGD. Analysis of low-dropout voltage regulator designed with gate-all-around nanosheet transistors [Internet]. SBMicro. 2023 ;[citado 2024 maio 04 ] Available from: https://doi.org/10.1109/SBMicro60499.2023.10302596
Trabalho de evento
Temperature influence on operational transconductance amplifier designed with triple gate TFET (2022)
Camargo, Raphael Gil; Martino, João Antonio ; Agopian, Paula Ghedini Der
Source: SBMICRO. Conference titles: Symposium on Microelectronics Technology. Unidade: EP
Subjects: ANÁLISE TÉRMICA, AMPLIFICADORES
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ABNT
CAMARGO, Raphael Gil e MARTINO, João Antonio e AGOPIAN, Paula Ghedini Der. Temperature influence on operational transconductance amplifier designed with triple gate TFET. 2022, Anais.. Piscataway: IEEE, 2022. Disponível em: https://doi.org/10.1109/SBMICRO55822.2022.9880962. Acesso em: 04 maio 2024.
APA
Camargo, R. G., Martino, J. A., & Agopian, P. G. D. (2022). Temperature influence on operational transconductance amplifier designed with triple gate TFET. In SBMICRO. Piscataway: IEEE. doi:10.1109/SBMICRO55822.2022.9880962
NLM
Camargo RG, Martino JA, Agopian PGD. Temperature influence on operational transconductance amplifier designed with triple gate TFET [Internet]. SBMICRO. 2022 ;[citado 2024 maio 04 ] Available from: https://doi.org/10.1109/SBMICRO55822.2022.9880962
Vancouver
Camargo RG, Martino JA, Agopian PGD. Temperature influence on operational transconductance amplifier designed with triple gate TFET [Internet]. SBMICRO. 2022 ;[citado 2024 maio 04 ] Available from: https://doi.org/10.1109/SBMICRO55822.2022.9880962
Artigo de periodico
Comparison between low-dropout voltage regulators designed with line and nanowire tunnel field effect transistors using experimental data (2022)
Toledo, Rodrigo do Nascimento; Silva, Wenita de Lima; Gonçalez Filho, Walter; Nogueira, Alexandro de Moraes; Martino, João Antonio ; Agopian, Paula Ghedini Der
Source: Solid State Electronics. Unidade: EP
Subjects: TRANSISTORES, CONDUTIVIDADE ELÉTRICA
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ABNT
TOLEDO, Rodrigo do Nascimento et al. Comparison between low-dropout voltage regulators designed with line and nanowire tunnel field effect transistors using experimental data. Solid State Electronics, v. 194, p. 1-4, 2022Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2022.108328. Acesso em: 04 maio 2024.
APA
Toledo, R. do N., Silva, W. de L., Gonçalez Filho, W., Nogueira, A. de M., Martino, J. A., & Agopian, P. G. D. (2022). Comparison between low-dropout voltage regulators designed with line and nanowire tunnel field effect transistors using experimental data. Solid State Electronics, 194, 1-4. doi:10.1016/j.sse.2022.108328
NLM
Toledo R do N, Silva W de L, Gonçalez Filho W, Nogueira A de M, Martino JA, Agopian PGD. Comparison between low-dropout voltage regulators designed with line and nanowire tunnel field effect transistors using experimental data [Internet]. Solid State Electronics. 2022 ; 194 1-4.[citado 2024 maio 04 ] Available from: https://doi.org/10.1016/j.sse.2022.108328
Vancouver
Toledo R do N, Silva W de L, Gonçalez Filho W, Nogueira A de M, Martino JA, Agopian PGD. Comparison between low-dropout voltage regulators designed with line and nanowire tunnel field effect transistors using experimental data [Internet]. Solid State Electronics. 2022 ; 194 1-4.[citado 2024 maio 04 ] Available from: https://doi.org/10.1016/j.sse.2022.108328
Trabalho de evento
Uniaxially strained silicon influence on two-stage operational transconductance amplifiers designed with SOI FinFET's (2022)
Ribeiro, Arllen D.R.; Araújo, Gustavo Vinicius de; Martino, João Antonio ; Agopian, Paula Ghedini Der
Source: SBMICRO. Conference titles: Symposium on Microelectronics Technology. Unidade: EP
Subjects: MICROELETRÔNICA, SILÍCIO, INOVAÇÕES TECNOLÓGICAS
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ABNT
RIBEIRO, Arllen D.R. et al. Uniaxially strained silicon influence on two-stage operational transconductance amplifiers designed with SOI FinFET's. 2022, Anais.. Piscataway: IEEE, 2022. Disponível em: https://doi.org/10.1109/SBMICRO55822.2022.9881005. Acesso em: 04 maio 2024.
APA
Ribeiro, A. D. R., Araújo, G. V. de, Martino, J. A., & Agopian, P. G. D. (2022). Uniaxially strained silicon influence on two-stage operational transconductance amplifiers designed with SOI FinFET's. In SBMICRO. Piscataway: IEEE. doi:10.1109/SBMICRO55822.2022.9881005
NLM
Ribeiro ADR, Araújo GV de, Martino JA, Agopian PGD. Uniaxially strained silicon influence on two-stage operational transconductance amplifiers designed with SOI FinFET's [Internet]. SBMICRO. 2022 ;[citado 2024 maio 04 ] Available from: https://doi.org/10.1109/SBMICRO55822.2022.9881005
Vancouver
Ribeiro ADR, Araújo GV de, Martino JA, Agopian PGD. Uniaxially strained silicon influence on two-stage operational transconductance amplifiers designed with SOI FinFET's [Internet]. SBMICRO. 2022 ;[citado 2024 maio 04 ] Available from: https://doi.org/10.1109/SBMICRO55822.2022.9881005
Trabalho de evento
Experimental behavior of line-TFET applied to low-dropout voltage regulator (2022)
Silva, Wenita de Lima; Agopian, Paula Ghedini Der ; Martino, João Antonio
Source: SBMICRO: proceedings. Conference titles: Symposium on Microelectronics Technology. Unidade: EP
Subjects: SEMICONDUTORES, ESTABILIDADE, CIRCUITOS ANALÓGICOS
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
SILVA, Wenita de Lima e AGOPIAN, Paula Ghedini Der e MARTINO, João Antonio. Experimental behavior of line-TFET applied to low-dropout voltage regulator. 2022, Anais.. [s.L.]: IEEE, 2022. Disponível em: https://doi.org/10.1109/SBMICRO55822.2022.9881041. Acesso em: 04 maio 2024.
APA
Silva, W. de L., Agopian, P. G. D., & Martino, J. A. (2022). Experimental behavior of line-TFET applied to low-dropout voltage regulator. In SBMICRO: proceedings. [s.L.]: IEEE. doi:10.1109/SBMICRO55822.2022.9881041
NLM
Silva W de L, Agopian PGD, Martino JA. Experimental behavior of line-TFET applied to low-dropout voltage regulator [Internet]. SBMICRO: proceedings. 2022 ;[citado 2024 maio 04 ] Available from: https://doi.org/10.1109/SBMICRO55822.2022.9881041
Vancouver
Silva W de L, Agopian PGD, Martino JA. Experimental behavior of line-TFET applied to low-dropout voltage regulator [Internet]. SBMICRO: proceedings. 2022 ;[citado 2024 maio 04 ] Available from: https://doi.org/10.1109/SBMICRO55822.2022.9881041
Artigo de periodico
Design of operational transconductance amplifier with gate-all-around nanosheet MOSFET using experimental data from room temperature to 200°C (2022)
Sousa, Julia Cristina Soares; Perina, Welder F; Rangel, Roberto; Simoen, Eddy ; Veloso, Anabela; Martino, João Antonio ; Agopian, Paula Ghedini Der
Source: Solid State Electronics. Unidade: EP
Subjects: NANOTECNOLOGIA, CIRCUITOS ANALÓGICOS, TRANSISTORES
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
SOUSA, Julia Cristina Soares et al. Design of operational transconductance amplifier with gate-all-around nanosheet MOSFET using experimental data from room temperature to 200°C. Solid State Electronics, v. 189, p. 1-9, 2022Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2022.108238. Acesso em: 04 maio 2024.
APA
Sousa, J. C. S., Perina, W. F., Rangel, R., Simoen, E., Veloso, A., Martino, J. A., & Agopian, P. G. D. (2022). Design of operational transconductance amplifier with gate-all-around nanosheet MOSFET using experimental data from room temperature to 200°C. Solid State Electronics, 189, 1-9. doi:10.1016/j.sse.2022.108238
NLM
Sousa JCS, Perina WF, Rangel R, Simoen E, Veloso A, Martino JA, Agopian PGD. Design of operational transconductance amplifier with gate-all-around nanosheet MOSFET using experimental data from room temperature to 200°C [Internet]. Solid State Electronics. 2022 ;189 1-9.[citado 2024 maio 04 ] Available from: https://doi.org/10.1016/j.sse.2022.108238
Vancouver
Sousa JCS, Perina WF, Rangel R, Simoen E, Veloso A, Martino JA, Agopian PGD. Design of operational transconductance amplifier with gate-all-around nanosheet MOSFET using experimental data from room temperature to 200°C [Internet]. Solid State Electronics. 2022 ;189 1-9.[citado 2024 maio 04 ] Available from: https://doi.org/10.1016/j.sse.2022.108238
Artigo de periodico
Signal to noise ratio in nanoscale bioFETs (2022)
Mori, Carlos Augusto Bergfeld; Martens, Koen; Simoen, Eddy ; Van Dorpe, Pol; Agopian, Paula Ghedini Der ; Martino, João Antonio
Source: Solid State Electronics. Unidade: EP
Subjects: NANOELETRÔNICA, DNA
A citação é gerada automaticamente e pode não estar totalmente de acordo com as normas
ABNT
MORI, Carlos Augusto Bergfeld et al. Signal to noise ratio in nanoscale bioFETs. Solid State Electronics, v. 194, p. 1-4, 2022Tradução . . Disponível em: https://doi.org/10.1016/j.sse.2022.108358. Acesso em: 04 maio 2024.
APA
Mori, C. A. B., Martens, K., Simoen, E., Van Dorpe, P., Agopian, P. G. D., & Martino, J. A. (2022). Signal to noise ratio in nanoscale bioFETs. Solid State Electronics, 194, 1-4. doi:10.1016/j.sse.2022.108358
NLM
Mori CAB, Martens K, Simoen E, Van Dorpe P, Agopian PGD, Martino JA. Signal to noise ratio in nanoscale bioFETs [Internet]. Solid State Electronics. 2022 ; 194 1-4.[citado 2024 maio 04 ] Available from: https://doi.org/10.1016/j.sse.2022.108358
Vancouver
Mori CAB, Martens K, Simoen E, Van Dorpe P, Agopian PGD, Martino JA. Signal to noise ratio in nanoscale bioFETs [Internet]. Solid State Electronics. 2022 ; 194 1-4.[citado 2024 maio 04 ] Available from: https://doi.org/10.1016/j.sse.2022.108358

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